What is 74LS107?
The 74LS107 is a JK Flip-Flop with individual J, K, Direct Clear, and Clock Pulse inputs. The clock‘s HIGH-to-LOW transition is what triggers output adjustments. For predictable functioning, the J and K inputs must be steady one setup time before the high-to-low clock change. The 74LS107 IC offers a large operating voltage range, a wide operating temperature range, and directly interfaces with CMOS, NMOS, and TTL.
Product details of 74LS107
- Technology Family: LS
- Dual JK Flip Flop Package IC
- -ve edge-triggered
- VCC (Min): 4.75V
- VCC (Max): 5.25
- Bits (#): 2
- Operating Voltage (Nom): 5V
- Frequency at normal voltage (Max): 35MHz
- Propagation delay (Max): 20ns
- IOL (Max): 8mA
- IOH (Max):-0.4mA
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